Kasinikota Sireesh kumar

Masters in VLSI Design from CDAC-NOIDA(GGSIPU), Working as a Design Verification engineer at Broadcom Ltd., Key interests include exploring the depths of verification through many real world problems and relating things with actual system level perspective.

Work Experience:

17 Years

Industry:

Function:

Work Experience

Broadcom Ltd

Started as an intern at Synopsys and quickly converted to fulltime spending 4 years there Then joined LSI India RD Limited to help establish a new mixed signal verification team Remained with the company through its acquisitionsfirst by Avago then Avagos acquisition of Broadcom with the combined entity taking the Broadcom name Currently leading a multi protocol SerDes verification engineering team at Broadcom Over the course of career have been recommended as the go to person with expertise on problem solving for the product worked on

Accomplishments

Education

Masters in VLSI design from CDAC-NOIDA(GGSIPU), Bachelors in Electronics and Control Systems (JNTU), Gate AIR 256 (EI stream).

Certification

Extra-curricular